Projeto de um ADC de muita alta velocidade utilizando algoritmos genéticos com calibração inteligente de erros de emparelhamento e temporais

The emergence of 5G+ digital mobile communications and the future arrival of 6G, demands for even higher data rates, lower latency, multi-band and massive connectivity. These requirements push for a significant increase of bandwidth, overpassing the 100 MHz frontier, in conjunction with higher level of modulation schemes supported on massive constellations configurations, such as 1024-QAM. This will imply the urgent need of ultra-high-speed, energy-efficient, low-noise Analog to Digital Converters (ADCs) which are fundamental key enablers for efficient digital RF transceivers that are presents at both ends of a communication link (base-station and remote user equipment). These ADCs serve as one of the fundamental building blocks for new applications that rely on rapid data transmission and processing, such as augmented reality (VR), autonomous vehicles, and the expanding Internet of Things (IoT), just to name a few examples. Massive MIMO, characterized by the deployment of multiple antennas in the communication link, significantly expands the need for ultra-high-speed ADCs. Therefore, energy efficiency achieved by these ADCs not only has an impact on network operational cost but also plays a role in the global push for sustainability. With data centers and network infrastructures accounting for a growing percentage of worldwide energy consumption, the design of this new generation of ADCs needs to address energy consumption aspects. Due to the large bandwidths required it is necessary to use multiple sub-ADCs in parallel, each with an appropriately skewed timing signal, resulting in a time interleaved ADC with a sampling frequency N times larger (where N is the number of sub-ADCs). However, this also increases the area and power of the TIADC N times, when compared to the sub-ADCs. Moreover, the mismatches and timing errors between the different sub-ADCs cause distortion and artifacts in the output signal, significantly degrading the TIADCs performance, which can have an ENOB 3 to 4 bit lower than the sub-ADCs. Therefore, to provide a suitable ADC for emerging 6G systems it will be necessary to address the previous issues. This project will reduce the area and power dissipation of the TIADC by using genetic algorithms to search for the best possible combination of number of sub-ADCs and stages and bits per stage in the sub-ADCs. It will also use calibration algorithms on the output to cancel the mismatch and timing errors in the circuits. The calibration will be based on artificial neural networks trained with signal like those encountered by the TIADC in the field. This should result in a “smart filter” that should be capable of eliminating unwanted artefact from the desired signals.